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XSAVEC

XSAVEC saves the current state of the processor's registers to a memory location. It uses a compacted format by skipping the saving of state components that are in their initial state (as defined by the XCR0 register) or components that have not been modified since the last initialization.

The following table describes the supported source and destination operands.

DO NOT support LOCK

XSAVEC is only available when the processor is operating in 64-bit mode or compatibility mode. The instruction requires the XSAVE feature to be enabled in the CPUID and the corresponding state components to be enabled in the XCR0 register.

The destination memory region mN MUST be aligned on a 64-byte boundary; failure to do so SHALL result in a general-protection exception (#GP). The memory region MUST be large enough to hold the state components enabled in XCR0, otherwise a general-protection exception (#GP) SHALL occur. Users MUST ensure that the XCR0 register is correctly configured before execution to avoid saving unnecessary state or triggering exceptions.