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XOR

Performs a bitwise logical exclusive OR operation on the source and destination operands. The result is stored in the destination.

The following table covers the supported source and destination operands.

Support LOCK

The instruction is supported in 64-bit mode, compatibility mode, and 32-bit mode. When operating on mN, the operand size must be specified (word, dword, or qword) to determine the width of the operation.

XORing a register with itself (e.g., XOR r64, r64) is a common idiom to zero the register. In x86-64, this is recognized by the hardware as a zeroing idiom, which does not modify the upper bits of the register in some implementations and avoids a data dependency on the previous value of the register.

The ZF (Zero Flag) is set if the result of the operation is zero; otherwise, it is cleared. The SF (Sign Flag) is set equal to the most significant bit of the result. The OF (Overflow Flag) and CF (Carry Flag) are always cleared.