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XCHG

Interchanges the contents of a destination operand and a source operand.

The following table covers the supported source and destination operands.

Support LOCK

XCHG is only available in 64-bit mode, 32-bit mode, and compatibility mode. If the destination is a memory operand, the instruction is implicitly locked, regardless of whether the LOCK prefix is explicitly used.

When performing an exchange between a register and memory, the operand size MUST match the register size (e.g., r64 with m8 is invalid). Use of the LOCK prefix on a register-to-register XCHG is ignored.

In 64-bit mode, if the memory operand is accessed via a RIP-relative address, the size of the displacement is a 32-bit signed integer. Failure to align memory operands to their natural boundary MAY result in performance degradation or atomicity failure across cache lines.