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XADD

Adds the contents of a source operand to a destination operand, storing the original value of the destination operand in the source operand and the result of the addition in the destination operand.

The following table covers what the source and destinations can be:

Support LOCK

XADD requires that both operands be of the same size. In 64-bit mode, if a 32-bit operand size is specified, the upper 32 bits of the destination register are not affected. The instruction is supported in 64-bit mode, 32-bit mode, and compatibility mode.

The instruction updates the EFLAGS register. Specifically, the Carry Flag (CF), Zero Flag (ZF), Sign Flag (SF), Overflow Flag (OF), Auxiliary Flag (AF), and Parity Flag (PF) are affected based on the result of the addition. When using a memory destination with the LOCK prefix, the operation is atomic, preventing other processors from accessing the memory location until the exchange and addition are complete.