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VSUBSH

Subtracts two packed signed 16-bit integers from the source operands and stores the result in the destination register.

The following table specifies the supported source and destination operands.

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the SSE4.1 instruction set extension.

The instruction operates on the lower 128 bits of the xmm registers; the upper bits of the destination register are not modified if the destination is the same as one of the sources (non-destructive). When using an immediate value, it is sign-extended to 16 bits before the subtraction. No flags are affected by this operation.