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VRSQRT28SD
Computes the reciprocal square root of a scalar double-precision floating-point value with a relative error of less than or equal to $2^{-28}$.
The following table describes the supported sources and destinations.
| source | destination(s) |
|---|---|
| m8 | xmm |
| xmm | xmm |
DO NOT support LOCK
This instruction is available only when the processor is operating in 64-bit mode or compatibility mode. It requires the AVX instruction set to be enabled.
The destination register is overwritten by the result. If the input is a signaling NaN, a #I exception SHALL be generated. If the input is $\pm 0$, the result is $\infty$ and a #Z exception SHALL be generated. If the input is $\pm \infty$, the result is $+0$ and a #P exception SHALL be generated. The precision of the result is limited to the specified 28-bit accuracy, which MAY result in a #P exception.