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VREDUCESS

Reduces the precision of a floating-point value from a double-precision format to a single-precision format.

The following table covers the supported source and destination operands.

DO NOT support LOCK

This instruction is only available when the processor is operating in a mode that supports AVX-512 and the specific feature flag for the corresponding subset is enabled.

The instruction performs rounding according to the rounding control word in the MXCSR register. If the source value is too large to be represented as a single-precision float, the operation SHALL signal #O and the result SHALL be the signed infinity of the corresponding sign. If the result is too small to be represented as a normalized single-precision float, the operation SHALL signal #U. Any result that cannot be represented exactly in the destination format SHALL signal #P.