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VRCPPH

Computes the reciprocal approximation of the lower 16 bits of a packed half-precision floating-point value. The instruction calculates an approximation of $1/x$ for each packed f16 element in the source operand.

The table after the description covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available when the processor supports the AVX-512 FP16 extensions. It requires the execution environment to be in 64-bit mode or compatibility mode.

The result is an approximation; the user SHOULD perform a Newton-Raphson iteration to refine the precision of the result. Since the instruction operates on f16 elements, ensure that the target registers are properly aligned to avoid general protection faults. The instruction does not trigger #Z or #O exceptions but MAY result in #P.