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VRANGESS

This instruction compares a set of floating-point values against a specified range defined by a lower and upper bound. It sets the corresponding bits in the destination mask register if the values fall within the range $lower, upper$, inclusive.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the AVX-512 foundation extensions to be supported by the processor.

The range bounds must be provided in registers; using memory operands for bounds may incur significant performance penalties. Ensure that the destination mask register is correctly initialized or cleared if partial updates are not intended. The behavior is subject to the floating-point rounding mode and exception masks defined in the MXCSR register.