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VPTESTMD

Performs a logical AND operation between the low-order dword of the first operand and the low-order dword of the second operand. If the result is non-zero, the ZF flag is cleared; otherwise, the ZF flag is set.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the AVX instruction set.

To avoid unexpected behavior, ensure that only the lower 32 bits of the source registers are considered, as the upper bits of the registers are ignored for the purpose of the logical test. The instruction does not modify the source operands.