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VPSCATTERDQ

This instruction stores 64-bit quadword elements from a zmm register into a memory region at addresses specified by an index vector. Each index is scaled by a constant specified in the immediate operand and added to a base address.

The following table specifies the supported source and destination operands.

DO NOT support LOCK

This instruction requires the AVX-512 foundation and the AVX-512DQ extension. It SHALL only be executed in 64-bit mode. If the instruction is executed in compatibility mode, it SHALL trigger an invalid opcode exception.

To avoid undefined behavior, the programmer MUST ensure that the destination memory region is properly aligned if the memory access crosses a page boundary. Since this instruction performs scatter operations, it is susceptible to memory aliasing; if multiple indices in the index vector point to the same memory location, the final value stored SHALL be the one from the element with the highest index. Masks SHALL be used to prevent illegal memory accesses for inactive elements.