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VPSCATTERDD

VPSCATTERDD scatters 32-bit doublewords from a zmm register to memory locations specified by a set of indices in another zmm register. For each element in the index register, the instruction calculates the destination address by adding the scaled index to a base address and stores the corresponding doubleword from the source register.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available when the processor supports the AVX-512 single-instruction multiple-data (SIMD) extensions. It requires a processor implementing the AVX-512F instruction set.

The instruction SHALL be used with a mask register (k-register); elements not enabled by the mask are not written to memory. Since the instruction performs multiple memory writes, it is not atomic. If the index register contains duplicate indices, the order of writes is determined by the element index in the registers, and the final value stored at the duplicated address is the one from the highest index element.

To avoid undefined behavior or segmentation faults, the user MUST ensure that the calculated effective addresses are within the allocated memory boundaries and that the index register contains valid i32 values. Failure to align the base address may result in performance degradation or alignment check exceptions depending on the processor configuration.