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VPROLVQ

Performs a variable precision low-precision multiply-accumulate operation on 64-bit signed integers. It multiplies two signed 64-bit integer values and adds the result to a destination operand.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is ONLY available when the processor is operating in 64-bit mode or compatibility mode. It requires the AVX-512 extension set to be enabled.

To avoid undefined behavior or exceptions, ensure that the destination register is correctly initialized if used as an accumulator. Failure to align memory operands to the required boundary may result in a general protection fault (#GP).