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VPMOVW2M

Moves word-sized elements from a SIMD register to a contiguous sequence of memory locations.

The following table covers what the source and destinations can be.

DO NOT support LOCK

The instruction SHALL be executed in 64-bit mode or compatibility mode. It REQUIRES support for AVX or AVX-512 depending on the register width used.

When using zmm registers, the instruction SHALL be used in conjunction with AVX-512. Ensure that the memory destination is correctly aligned to avoid performance penalties, although the instruction DOES NOT REQUIRE strict alignment. Overlapping memory regions between source and destination are NOT supported and may result in undefined behavior.