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VPMOVUSWB

Zero-extends unsigned bytes from the source to signed words in the destination.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is only available in 64-bit mode or compatibility mode. It requires the AVX-512BW extension to be supported by the processor.

The destination register must be twice the size of the source input to accommodate the zero-extension from u8 to i16. Failure to provide a sufficiently large destination register for the intended vector length will result in out-of-bounds memory access or data truncation.