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VPMOVUSQW

Moves unsigned 16-bit integers from a source to 64-bit integers in a destination, with zero-extension.

The following table describes the supported source and destination operands.

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the AVX or AVX-512 extensions depending on the register width used (XMM, YMM, or ZMM).

The destination register MUST be sufficiently large to hold the expanded data; failure to provide a register of the correct width results in an invalid opcode. When using the EVEX prefix, the instruction supports masking and broadcasting of the source operand. Memory accesses MUST be aligned to the size of the accessed element to avoid performance penalties, although the hardware handles unaligned accesses.