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VPMOVUSQD

Moves unsigned quadword integers from a source to a destination, converting them to signed quadword integers.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available only in 64-bit mode. It requires the AVX-512F instruction set extension to be supported by the processor.

Ensure that the destination register size matches the intended operation to avoid unintended data truncation or overlap when using masked versions of this instruction. When accessing memory, the source address MUST be aligned to the size of the element to avoid performance penalties or faults depending on the alignment check flags.