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VPMOVUSDB

Zero-extends each byte from the source operand to a doubleword in the destination operand.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode or compatibility mode. It requires the AVX extension.

The destination register is overwritten. Because this instruction expands 8-bit elements to 32-bit elements, it SHALL only be used with the 128-bit version of the instruction when the destination is an xmm register to avoid out-of-bounds access or unintended register overlapping if used in a wider YMM context without proper alignment. Memory sources SHALL be aligned to the size of the accessed data to avoid performance penalties or faults.