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VPMOVSQD

Moves a quadword integer value from the source operand to the destination operand.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction requires the processor to support the AVX extension. It operates in 64-bit mode or compatibility mode.

To avoid undefined behavior or faults, ensure that memory accesses are aligned to the appropriate boundary if using aligned move variants, although VPMOVSQD typically performs unaligned accesses. The instruction only affects the lower 64 bits of the destination xmm register; the upper 64 bits of the destination xmm register are zeroed.