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VPMOVSDW

Converts signed dword integers from a source to signed word integers in a destination. The instruction extracts the lower 16 bits of each 32-bit element from the source and stores them in the destination.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode or compatibility mode. It requires the AVX CPU feature flag to be supported by the processor.

The destination register is partially overwritten based on the number of elements converted; however, in the VPMOVSDW case, the destination xmm register is fully updated. Failure to ensure the source memory alignment may result in performance degradation.