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VPMOVDW

Moves double words to words. This instruction converts a packed 128-bit or 256-bit vector of 32-bit signed integers to a packed vector of 16-bit signed integers by saturating the values to the range of a signed word.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the AVX instruction set extensions.

The destination register is overwritten. If the source is a memory operand, it MUST be aligned to the size of the vector to avoid performance penalties or alignment exceptions depending on the CPU configuration. Since this is a saturating operation, any value exceeding the range of a signed 16-bit integer (i16) will be clamped to the maximum or minimum representable value of i16.