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VPEXPANDD

Expands a packed sequence of double-precision floating-point values from a source operand to a destination operand by inserting zeros between the original elements. The number of elements to be expanded is determined by the vector length and the mask register.

The following table describes the supported source and destination operands.

DO NOT support LOCK

This instruction SHALL only be executed in 64-bit mode. It requires AVX-512 support and specifically the AVX-512 Foundation instructions.

The destination register is updated based on the provided opmask register. Elements in the destination that are not selected by the mask remain unchanged. If the source operand is a memory region (m64), the alignment MUST comply with the requirements of the specific AVX-512 implementation to avoid performance penalties or faults. Using a mask that results in out-of-bounds access relative to the destination register size SHALL result in undefined behavior or a general protection fault.