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VPERMT2Q

VPERMT2Q permutes quadwords from two source registers based on an index provided in a third register. For each 64-bit element in the destination, the instruction uses the corresponding 2-bit index from the index register to select a quadword from either the first or second source register.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode. It requires the AVX-512 foundation and the AVX-512BW instruction set.

The index register is treated as a series of 2-bit indices; any bits in the index register beyond those required to address the available quadwords in the sources are ignored. Users MUST ensure the index register is correctly initialized to avoid unexpected element selection, although it does not trigger a processor exception for out-of-range indices.