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VPDPWSSD

Multiplies signed word-size elements from a source register and a source memory or register location, adds the results to the destination register elements, and stores the result as signed doubleword-size elements.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction SHALL be used only in 64-bit mode. It is not supported in compatibility mode.

The destination register MUST be larger than the source registers to accommodate the widening from word (16-bit) to doubleword (32-bit) results. Failure to ensure the destination register is correctly initialized or sized for the vector length may result in undefined behavior or General Protection faults if accessing out-of-bounds memory.