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VPCMPUQ

Compares two unsigned quadword integers from the first source operand and the second source operand and stores the result in the destination operand. The comparison is performed according to the condition specified by the immediate byte.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode. It requires a processor supporting the AVX-512 foundation.

The immediate byte determines the comparison predicate. Using an unsupported immediate value will result in an invalid opcode exception. When operating on YMM or XMM registers, the upper bits of the ZMM register are zeroed. The operation is performed element-wise; the number of elements processed depends on the vector length (k-masking may be applied if the EVEX prefix is used).