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VMOVSH

Moves a packed signed 16-bit integer from the source to the low 16 bits of the destination.

The following table covers the supported sources and destinations:

DO NOT support LOCK

This instruction is only available when the processor supports the AVX or AVX-512 instruction sets. It MUST be executed in 64-bit mode or 32-bit mode.

The destination register is overwritten. If a zmm register is used as the destination, the upper bits of the register beyond the target word are preserved unless the instruction is part of a specific AVX-512 mask operation. Users SHOULD ensure that the source memory is properly aligned to avoid performance penalties.