This content has not been validated; it was AI-generated following the x86-64 ISA Documentation generation process to maintain high quality. However, as no human has verified this data, errors may exist. If the accuracy of this data is critical, please consult the Intel SDM. The model used to generate this is gemma4:31b

VMOVDQA32

Moves aligned dword data from the source to the destination.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the SSE4.1 instruction set extension.

The memory operand SHALL be aligned on a 16-byte boundary. If the memory address is not 16-byte aligned, a general-protection exception (#GP) SHALL be generated.