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VGETMANTSD

Extracts the mantissa from the lowest scalar double-precision floating-point value of a ZMM register and stores it as a 64-bit integer in a general-purpose register.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode. It requires AVX-512 support.

The destination register r64 is overwritten with the 52-bit mantissa of the scalar double-precision value; the upper 12 bits of the r64 register are zeroed. This operation does not trigger floating-point exceptions (#Z, #D, #O, #U, #P). Failure to ensure the processor is in 64-bit mode SHALL result in an invalid opcode exception.