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VFNMSUB213SS

Computes the fused multiply-subtract of three scalar single-precision floating-point values. The operation is performed as: $dest = (a \times b) - c$, where the operands are mapped based on the instruction encoding (213 indicates the destination is the third operand).

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode or 32-bit mode. It SHALL NOT be used in 16-bit compatibility mode. It requires the AVX CPU feature flag to be supported by the hardware.

To avoid precision loss or unexpected results, be aware that this instruction performs a single rounding step at the end of the operation. This prevents the accumulation of intermediate rounding errors that would occur if using separate VMULSS and VSUBSS instructions. If the result exceeds the maximum representable value of a f32, it SHALL trigger #O. If the result is too small to be represented, it SHALL trigger #U. Results that cannot be represented exactly SHALL trigger #P.