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VFNMSUB213SH

Subtracts the product of two floating-point source operands from a third source operand, then multiplies the result by a scalar and stores the result in a destination operand. Specifically, it computes $dest = (src1 - (src2 \times src3)) \times \text{scalar}$.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is only available when the processor is operating in 64-bit mode or compatibility mode. It requires the AVX-512 foundation and the AVX-512 Floating-Point (AVX512F) extension.

The operation is subject to the rounding mode and exception handling specified in the MXCSR register. If the result exceeds the representable range of the destination format, an #O exception may be triggered. Inexact results will trigger the #P exception. Memory operands are not supported; operands SHALL be stored in zmm or ymm registers.