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VFNMADD231PS
Computes the fused multiply-subtract of three floating-point values. It calculates the result using the formula: $destination = (f32 \times f32) - f32$. Specifically, it multiplies the second operand by the third operand and subtracts the result from the first operand.
The following table covers what the source and destinations can be:
| source | destination(s) |
|---|---|
| reg | reg |
| reg | m32 |
| m32 | reg |
| m32 | m32 |
DO NOT support LOCK
This instruction is available only in 64-bit mode or compatibility mode. It requires the AVX and FMA support features to be enabled in the processor.
The operation is performed with a single rounding step at the end, which prevents intermediate rounding errors and avoids potential precision loss. The result is subject to the rounding mode specified in the MXCSR register. If the result is not representable within the destination format, it may trigger #O or #U. The instruction may trigger #D if any input operand is a denormal value and #P if the result is inexact.