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VFNMADD213SS

Computes a fused multiply-add operation on scalar single-precision floating-point values. The instruction calculates the result of -(a * c) + b and stores the result in the destination operand. Specifically, it multiplies the first operand by the third operand, negates the product, and adds the second operand.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction requires the FMA3 feature flag to be supported by the processor. It is available in 64-bit mode and compatibility mode.

To avoid precision loss or unexpected behavior, ensure that the MXCSR register is correctly configured for rounding modes and denormal handling, as the operation is performed as a single fused step with only one rounding operation at the end. The instruction will trigger #P if the result is inexact, and #O or #U depending on the magnitude of the fused result.