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VFNMADD213PH

Performs a fused multiply-subtract operation on half-precision floating-point values. The instruction computes the result as (a * c) - b and stores it in the destination. The operation is performed on packed f16 elements.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction requires the AVX-512 FP16 extension. It is not available in compatibility mode if the processor does not support the corresponding AVX-512 feature set.

The operation must be performed using the precision and rounding control specified in the MXCSR register. Incorrect configuration of the rounding mode may result in unexpected precision loss or #P. Ensure that the target processor supports the AVX-512 FP16 instruction set to avoid #UD (Undefined Instruction) exceptions.