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VFNMADD132PH

Computes a fused multiply-subtract operation on half-precision floating-point values. The instruction calculates the result as $(a \times c) - b$ and stores it in the destination.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the AVX-512 FP16 extension to be supported by the processor.

The operation is performed using the precision specified by the half-precision (16-bit) floating-point format. The intermediate product $(a \times c)$ is calculated with infinite precision before the subtraction of $b$, avoiding intermediate rounding errors. This may trigger the following floating-point exceptions: #D, #O, #U, and #P.