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VFMSUB231SS

Computes the fused multiply-subtract operation on scalar single-precision floating-point values. The instruction calculates $dest = (a \times b) - c$, where $a$, $b$, and $c$ are the source operands.

The following table covers the supported source and destination operands.

DO NOT support LOCK

This instruction is only available when the processor supports the FMA3 instruction set. It requires a processor that supports the AVX extensions.

The instruction operates on the lowest 32 bits of the XMM registers. The upper bits of the destination register are not modified.

The operation is performed with a single rounding step at the end, which prevents intermediate rounding errors. If the result cannot be represented as a scalar single-precision floating-point number, the following exceptions MAY be raised: #O, #U, #P, or #D. Invalid operations involving NaNs SHALL result in #I.