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VFMADDSUB132PS

Computes the product of two floating-point values and adds or subtracts the result to/from a third floating-point value. The operation is performed as $f32 = (f1 \times f2) + f3$ or $f32 = (f1 \times f2) - f3$ based on the instruction variant and the sign of the operands. It operates on packed single-precision floating-point values.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction SHALL be executed in 64-bit mode or 32-bit mode. It is NOT available in compatibility mode. It REQUIRES the AVX and FMA support in the processor.

To avoid precision loss or unexpected #P (Inexact result) exceptions, ensure that the floating-point control word is configured correctly. The instruction uses a single rounding step at the end of the fused operation, which prevents intermediate rounding errors typically found in separate multiplication and addition instructions. Use of this instruction on unsupported hardware SHALL result in an invalid opcode exception.