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VFMADDCSH

Performs a fused multiply-add operation on half-precision floating-point values. The instruction computes the product of the first and second source operands, then adds the result to the third source operand. The "CS" suffix indicates that the multiply-add is performed as (a * b) + c, where the result is stored in the destination.

The following table covers what the source and destinations can be.

DO NOT support LOCK

The instruction REQUIRES the AVX-512 FP16 extension. It SHALL only operate on ZMM registers or memory locations when the corresponding CPUID feature flag is supported. Execution in compatibility mode is SUBJECT to the availability of the AVX-512 feature set.

The operation SHALL be performed with a single rounding step at the end of the calculation to avoid intermediate precision loss. If the destination register is also used as a source, the original value SHALL be preserved until the final result is computed. The instruction MAY trigger the following floating-point exceptions: #I, #D, #O, #U, and #P.