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VFMADD132PS

Performs a fused multiply-add operation on single-precision floating-point values. It computes the product of the second and third operands and adds the result to the first operand. The operation is performed as a single step with only one rounding error at the end.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction SHALL be executed in 64-bit mode or compatibility mode. It REQUIRES the FMA3 feature set to be enabled in the processor.

To avoid precision loss or incorrect results, ensure that the MXCSR register is configured with the desired rounding mode, as the fused operation only rounds once after the summation. Failure to account for the 132 operand order (dest = dest + (src2 * src3)) may lead to logic errors in mathematical expressions compared to standard VFMADD213PS or VFMADD231PS instructions. Results may trigger #P, #O, #U, or #D exceptions based on the floating-point environment.