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VEXTRACTF128

Extracts a 128-bit lane from a 256-bit XMM/YMM register and stores it in the destination XMM register. The specific lane is determined by the immediate operand.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction SHALL only be executed when the AVX instruction set is supported. It is available in both 64-bit mode and compatibility mode.

The immediate operand MUST be either 0 or 1. If an immediate other than 0 or 1 is provided, the instruction SHALL encode as invalid or result in an undefined operation depending on the assembler. Using an immediate of 0 extracts the low 128 bits; an immediate of 1 extracts the high 128 bits. Mixing YMM and XMM registers without proper state transitions MAY lead to performance penalties due to AVX-SSE transitions.