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VEXP2PD

Converts packed 64-bit floating-point values to 64-bit floating-point values by calculating the base-2 exponential ($2^x$) of each element.

The following table specifies the supported source and destination operands.

DO NOT support LOCK

This instruction is only available in 64-bit mode or 32-bit mode when the AVX-512 foundation instructions are supported. It requires the AVX-512DQ extension.

The result is rounded according to the rounding control (RC) field in the MXCSR register. The following exceptions may be raised:

• #O: Raised if the result is larger than the maximum representable f64 value.
• #U: Raised if the result is smaller than the minimum representable f64 value.
• #P: Raised if the result is not exact.

When the input is a signaling NaN, #I is raised. If the input is a quiet NaN, the result is a quiet NaN. If the input is $\pm\infty$, the result is $\pm\infty$ respectively.