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VCVTUSI2SS

Converts an unsigned 32-bit integer to a single-precision floating-point number. The result is stored in the destination operand.

The following table covers the supported source and destination operands.

DO NOT support LOCK

This instruction is available in 64-bit mode and 32-bit mode. It is not available in compatibility mode if the processor does not support the SSE3 instruction set.

To avoid precision loss, note that the conversion of a $u32$ to an $f32$ may result in the #P exception if the integer value cannot be represented exactly in the destination floating-point format. The rounding is governed by the rounding control bits in the MXCSR register.