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VCVTUDQ2PS

Converts four unsigned 64-bit integers from a qword-aligned memory location or an XMM register to four single-precision floating-point numbers.

The following table describes the supported sources and destinations.

DO NOT support LOCK

This instruction is available only in 64-bit mode. It is NOT supported in compatibility mode.

To avoid #O exceptions or precision loss, ensure the input u64 values are within the representable range of a single-precision float. Since the conversion is from unsigned 64-bit integers, values exceeding the maximum precision of the f32 format will be rounded according to the rounding control bits in the MXCSR register, potentially resulting in #P. Memory operands MUST be 256-bit aligned to avoid alignment check exceptions or performance penalties.