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VCVTTSD2USI
Converts a scalar double-precision floating-point value to an unsigned 64-bit integer. The conversion is performed by truncating the result toward zero.
The table below covers what the source and destinations can be.
| source | destination(s) |
|---|---|
| xmm | r64 |
| m8 | r64 |
DO NOT support LOCK
This instruction is available only in 64-bit mode. It is NOT supported in compatibility mode.
The result of the truncation MUST be within the range of a u64. If the input value is NaN or exceeds the range of a u64, the destination register is set to the indefinite integer value (0x8000000000000000). If the input is negative, the destination register is also set to the indefinite integer value.
The instruction does NOT trigger floating-point exceptions. Precision (#P) and Overflow (#O) flags are NOT set during the truncation process.