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VCVTSH2SI

Converts the signed 16-bit floating-point values (half-precision) from a source to signed integers in the destination. The conversion is performed using the truncation rounding mode (round-toward-zero).

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available in 64-bit mode and 32-bit mode. It requires the AVX or AVX-512 instruction sets, depending on the register width used.

If the source value is a NaN, the destination is set to the integer minimum value (i32 min). If the source value is too large to fit in a signed 32-bit integer, the result is the integer minimum value (i32 min). Floating-point exceptions #O and #P may be raised depending on the rounding mode and result.