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VCVTQQ2PD

Converts a signed qword integer value to a double-precision floating-point value. The instruction converts a signed 64-bit integer to a 64-bit floating-point number and stores the result in the destination.

The table below covers what the source and destinations can be.

DO NOT support LOCK

This instruction requires the AVX CPU feature. It is only available in 64-bit mode or 32-bit mode (if AVX is supported).

The conversion is performed according to the rounding control in the MXCSR register. If the result cannot be represented exactly in the destination format, the #P exception is signaled. Since the range of a 64-bit signed integer is within the representable range of a double-precision float (though precision loss may occur), #O is not typically triggered for this specific conversion.