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VCVTPS2PH

Converts packed single-precision floating-point values to packed half-precision floating-point values according to the rounding mode specified in the immediate operand.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode and 32-bit mode. It requires the AVX-512 FP16 extension.

The rounding mode is controlled by the immediate operand; if the immediate is not a valid rounding mode, the instruction shall trigger an invalid operand exception. If the rounding mode is not specified via the immediate, the rounding is governed by the MXCSR register.

Failure to provide an xmm register as a destination will result in a compile-time error or an illegal instruction exception. Precision loss is expected when converting from f32 to f16, which SHALL trigger #P if the result is inexact. Numeric overflow resulting in infinity SHALL trigger #O.