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Converts packed double-precision floating-point values to packed unsigned 64-bit integers with truncation. Each f64 value in the source is converted to a u64 value; if the value is too large or too small to fit in the destination, the result is set to the maximum or minimum representable u64 value respectively, or triggers an exception depending on the rounding mode.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is only available in 64-bit mode. It requires AVX support.

The instruction uses the rounding-control field in the MXCSR register to determine the rounding mode. If the source value is NaN, the result is undefined and may trigger #I. If the value is out of range for a u64, #O is signaled. Precision loss during truncation may trigger #P.