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V4FMADDSS

Multiplies a scalar single-precision floating-point value by another scalar single-precision floating-point value, adds the result to a scalar single-precision floating-point value, and stores the result in the destination operand.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode or 32-bit mode. It requires the VEX encoding scheme.

The instruction is subject to the current floating-point rounding control and exception mask settings in the MXCSR register. If the result cannot be represented as a single-precision floating-point number, it SHALL trigger #O or #U. Precision loss SHALL trigger #P.

To avoid performance degradation due to alignment issues, memory operands SHOULD be aligned to 4-byte boundaries. Failure to do so may result in increased latency or page faults if the operand crosses a page boundary.