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UNPCKHPS

Unpacks the high quadword from two XMM operands into a single XMM destination register. The instruction selects the upper two f32 elements from each source operand and concatenates them into the destination register.

The table after the description covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available in 32-bit mode and 64-bit mode. It requires the SSE3 instruction set extension.

The destination register must not be the same as the memory source operand to avoid undefined behavior resulting from read-after-write hazards. All operations are performed on f32 values; if the source operands contain non-canonical floating-point representations, the instruction will process them as-is without triggering #S exceptions.