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TILESTORED

TILESTORED stores the contents of a specified tile register to a memory location.

The following table specifies the supported source and destination operands.

DO NOT support LOCK

The instruction SHALL only be executed when the processor is in 64-bit mode. The memory destination MUST be aligned to the requirements of the tile architecture to avoid alignment exceptions.

The instruction requires the AMX (Advanced Matrix Extensions) feature to be enabled in the CPU and the tile configuration to be initialized via TCONFIG. If the tile state is not enabled, executing TILESTORED SHALL result in an undefined operation (#I).